Tang Nano 9K

Introducing the Tang Nano 9K: the perfect device for the busy hobbyist! This advanced FPGA chip has a massive capacity with 8640 LUT4 logic units, 6480 registers, 17280 ShadowSRAM SSRAM bits, 468K Block SRAM BSRAM bits, 608K User Flash bits, and up to 64M SDR SDRAM. It can easily handle complex projects.

Tang nano 9K is a development board based on the Gowin GW1NR-9 FPGA chip. It equips with an HDMI connector, RGB screen interface connector, SPI screen connector, 32Mbit SPI flash, and 6 LEDs, so users can use it for FPGA verification, RISC-V soft core verification, and basic function verification easily and quickly.

Its 8640 LUT4 logic units can not only be used for various complex logic circuit designing but also used for running a complete PicoRV softcore. It also meets various needs of users, such as learning FPGA, verifying softcore, and further design.

On-board Function Block

The above image shows you the multiple functions that the Tang Nano can do and also which pins and ports you will need to use to access those functions.

Tang Nano 9K Pin Map 

The above image shows you all the pinouts of the Tang Nano and how to access more of the functionality of each pin.

User Guide

1. Download our packaged user guide document: Click me (All PDFs mentioned below are here)

2. Install IDE and configure license: Click me

3. Read this file (in the file downloaded in step 1): SUG100-2.6E_Gowin Software User Guide.pdf

4. Read this tutorial (LED lighting experiment).
   We suggest you recreate a project and light the led by yourself, this can help you know more about the steps of FPGA.
   We recommended you read the following tips during this process:

   • Verilog code specifications (please search by yourself. It is very necessary to obey good code specifications from the beginning)

   The following documents are very useful for learning FPGA, so we should read them.
   - SUG949-1.1E_Gowin HDL Coding User Guide.pdf
   - UG286-1.9.1E_Gowin Clock User Guide.pdf
   The documents mentioned above can be downloaded from our Download station
   And there has been a compressed package containing all documents

   Online tutorial:
   We suggest two excellent learning sites about Verilog: HDLBITs and Verilog Page

5. Read this tutorial (5-inch RGB screen Display tutorial). If you can't complete this experiment.
   

6. Documents to read:

   • rPLL IP core reference: Click the menubar Tools>IP Core Generator>Hard Module>CLOCK>rPLL
     Click to see reference

     
   • SUG284-2.1E_Gowin IP Core Generator User Guide.pdf (Page 28)

7. Explanation of HDMI display (to be updated)

8. PicoRV soft core test

Tang Nano 9K Specification

• Logic units(LUT4): 8640
• Registers(FF): 6480
• ShadowSRAM SSRAM(bits): 17280
• Block SRAM BSRAM(bits): 468K
• Number of B-SRAM: 26
• User flash(bits): 608K
• SDR SDRAM(bits): 64M
• 18 x 18 Multiplier: 20
• SPI FLASH: 32M-bit
• Number of PLL: 2
• Display interface: HDMI interface, SPI screen interface, and RGB screen interface
• Debugger: Onboard BL702 chip provides USB-JTAG and USB-UART functions for GW1NR-9
• IO: supports 4mA、8mA、16mA、24mA other driving capabilities, Provides independent Bus Keeper, pull-up/pull-down resistors, and Open Drain output options for each I/O
• Connector: TF card slot, 2x24P 2.54mm Header pads
• Button: 2 programmable buttons for users
• LED: Onboard 6 programmable LEDs

Documentation

• FPGA Datasheet
• Tang Nano schematic